Event at a Glance
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The principal goal of DVClub Europe is to have fun while helping build the verification community through regular educational and networking events.
Attendance at DVClub Europe events is free and open to all non-service provider semiconductor professionals.
Agenda (GMT):
Time | Session Description |
11.30 GMT | Arrival and Networking |
12.00 GMT | Welcome and Introduction Mike Bartley, Senior Vice President – VLSI Design, Tessolve |
12.05 GMT | A Multi-Tiered Approach to Verifying Cache Coherency – Tom Anderson, Cadence Design Systems. – Download: Presentation Slides | Video Presentation |
12.30 GMT | ARMv8 Cache Coherency Verification with TrekSoC Portable Stimulus Models – Adnan Hamid, Breker Verification Systems.– Download: Presentation Slides | Video Presentation |
12.55 GMT | Cache Coherency: The Next Big Problem in SoC Verification – Robert Fredieu, Mentor Graphics – Download: Presentation Slides | Video Presentation |
13.20 GMT | Closing Remarks |
13.25 GMT | Networking |
Venues
- Bristol: Imagination Technologies, 715 Aztec West, Almondsbury, Bristol, BS32 4UD, UK.
- Cambridge: ARM, 110 Fulbourn Road, Cambridge, CB1 9NJ, UK
- Grenoble: STMicroelectronics – Polygone Scientifique, 12 Rue Jules Horowitz, Grenoble, France
- Remote Access
Registration
Now Closed
Sponsors
DVCLUB Europe is made possible through the generosity of our sponsors.