Event at a Glance
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The principal goal of DVClub Europe is to have fun while helping build the verification community through regular educational and networking events. DVClub Europe 2015 attendance is free and is open to all non-service provider semiconductor professionals.
Agenda (BST):
Time | Session Description |
11.30 BST | Arrival and Networking |
12.00 BST | Welcome and Introduction Mike Bartley, Senior Vice President – VLSI Design, Tessolve |
12.05 BST | Mentor Graphics, Gabriel Chidolue (Verification Technologist) Successive Refinement: A Methodology for Incremental Specification of Power Intent using UPF |
12.35 BST | Breker Verification Systems, Adnan Hamid (Co-Founder and CTO) Low Power Verification with Graph-Based Portable Stimulus |
12.55 BST | Synopsys, Srobona Mitra (Senior R&D Engineer) Static Power Intent Verification of Power State Switching Expressions |
13.15 BST | ARM Embedded Technologies, Divyeshkumar Dhanjibhai Vora (Staff Design Engineer) Challenges with Power Aware Simulation and Verification Methodologies |
13.35 BST | Close and Networking |
Venues
- Bristol: Broadcom, 910 Aztec West, Almondsbury, Bristol, BS32 4SR
- Cambridge: ARM, 110 Fulbourn Road, Cambridge, CB1 9NJ
- Grenoble: STMicroelectronics – Polygone Scientifique, 12 Rue Jules Horowitz, Grenoble
- Sophia: Business Pôle, Entrée A, 1047, Route des Dolines, 06901 Sophia Antipolis Cedex
- Remote Access
Registration
Registration is now closed
Sponsors
DVCLUB Europe is made possible through the generosity of our sponsors.