Event at a Glance
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Using Python in Verification
Four verification experts will spend 20 minutes each outlining tools and methodologies aimed at using python in Verification.
Agenda (BST):
Time | Session Description | Slides | Videos | |
12.00 BST 16:30 IST |
Welcome and Introduction Mike Bartley, Senior Vice President – VLSI Design, Tessolve |
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12.05 BST 16:35 IST |
Ray Salemi, Aerospace and Defence Solutions Manager, Siemens Digital Industries Software |
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12.25 BST 16:55 IST |
Constrained random stimulus generation in Python Ian Quinn, Member of the Silicon Team, Graphcore |
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12.40 BST 17:10 IST |
Coverage in Python – pros and cons Svet Hristozkov, Verification Engineer, Graphcore |
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12.55 BST 17:25 IST |
Why you shouldn’t use Python for Verification Rich Porter, Graphcore |
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13.10 BST 17:40 IST |
Processor Verification in Python Lavanya J, Project Officer, IIT – Madras |
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13.30 BST 18:00 IST | Closing Remarks | |||
13.35 BST 18:05 IST | Close |
About DVClub
The principal goal of each DVCLUB meeting is to have fun while helping build the European verification community through regular educational and networking events. Attendance at DVClub Europe meetings is free and is open to all non-service provider semiconductor professionals. Each meeting addresses a specific issue faced by the design and verification community and whatever your speciality provides an excellent opportunity for updating knowledge as well as share experiences, insights and issues with other members of the verification community.
Sponsors
DVCLUB Europe is made possible through the generosity of our sponsors.