Event at a Glance
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Verifying Analog and Physical Designs
The principal goal of each DVCLUB meeting is to have fun while helping build the European verification community through regular educational and networking events. Attendance at DVClub Europe meetings is free and is open to all non-service provider semiconductor professionals. Each meeting addresses a specific issue faced by the design and verification community and whatever your speciality provides an excellent opportunity for updating knowledge as well as share experiences, insights and issues with other members of the verification community.
Agenda (GMT):
Time | Session Description |
11.30 GMT | Arrival and Networking |
12.00 GMT | Welcome and Introduction Mike Bartley, Senior Vice President – VLSI Design, Tessolve |
12.05 GMT | IOT is IOMSLPT for Verification Engineers – Adam Sherer, Product Management Group Director, Cadence |
12.30 GMT | Co-Simulation for Functional Equivalence Checking – Vireen Vodapalli, ARM Embedded Systems PVT Ltd, |
12.55 GMT | Real Value Modeling for Improving the Verification Performance – Mallikarjuna Reddy, Test and Verification Solutions – K. Venkatramanarao, Mindlance Technologies |
13.20 GMT | Closing Remarks |
13.25 GMT | Networking |
Venues
- Bristol: Almondsbury Interchange Hotel, Gloucester Road, Almondsbury, Bristol, BS32 4AA
- Cambridge: ARM, 110 Fulbourn Road, Cambridge, CB1 9NJ, UK
- Grenoble: STMicroelectronics – Polygone Scientifique, 12 Rue Jules Horowitz, Grenoble, France
- Remote Access
Sponsors
DVCLUB Europe is made possible through the generosity of our sponsors.